6805 Introduction
.cr 6805 To load the 6805 cross overlay
.cr 146805 To load the 146805 cross overlay
.cr 68hc05 To load the 68HC05 cross overlay
The Motorola 68(HC)05 family of micro controllers are the natural successors of the 6804 family.
There are 3 main family branches: 6805 (NMOS), 146805 (CMOS) and 68HC05 (HCMOS).
All branches are basically the same when it comes to the programming.
Only the CMOS and the HCMOS devices have some extra instructions for power reduction and bit manipulation.
All these devices are quite similar and that's why I describe all their cross overlays here on one page.
The opcode test files included in the download package show all the processor specific instructions and new addressing modes.
Programming Model
The programming model in the picture below shows the modest register set of the 6805 processor family. I only include a little summary about the features of the 6805's programming model here. It is not my intention to make the original documentation obsolete, so please refer to the original documentation for further details.
Don't be alarmed by the small number of registers compared to other processor types.
The 6805 has a very powerful addressing mode called direct page addressing.
This way all 256 bytes of page 0 in memory can be addressed with only 8 bits.
These 256 addresses can be considered the "registers" of the 6805!
All I/O related memory is also located in page 0, which makes I/O access quite fast.
The Accumulator A
The Accumulator is used for all arithmetic operations.
The Condition Code Register
The CCR register holds all the system flags. Most flags reflect the status of the machine after mathematical instructions.
The CCR contains 5 system flags:
| Bit 7 | 1 | Aleays reads 1 |
| Bit 6 | 1 | Aleays reads 1 |
| Bit 5 | 1 | Aleays reads 1 |
| Bit 4 | H | Half Carry Flag |
| Bit 3 | I | Interrupt Mask Flag |
| Bit 2 | N | Negative Flag |
| Bit 1 | Z | Zero Flag |
| Bit 0 | C | Carry Flag |
IRQ interrupts are disabled when the I bit is set.
The three unused bits always read as "1".
The Index register X
This register can be used as an 8-bit unsigned index to a 0, 8 or 16-bit constant offset.
The official notation of the indexed addressing mode is offset,X, where offset is a 0, 8, or 16-bit unsigned offset value.
However usually the offset value is $00 and that can be written in three different ways in the SB-Assembler:
LDA $00,X
LDA ,X
LDA X
All three instructions have the same effect and all use an offset value of $00.
The SB-Assembler will automatically choose the most economical addressing mode, depending on the offset value. The assembler will opt for the worst case situation if the offset expression uses a forward referenced label.
The Stack Pointer
The 6805 has a 6-bit stack pointer.
This limits the stack to a maximum of 64 bytes, located at the top of page zero.
Because of the limited stack space it is not possible to use the stack for temporary data storage or parameter passing.
The stack pointer always points to the first available stack location.
A value to be pushed is stored at the location that is pointed to by SP, then SP is decremented.
The stack on a 6805 grows down in memory when data is pushed on to it.
Words are pushed with their LSB first.
Subroutine calls and interrupts push the return address on the stack.
This is the address of the instruction that has to be executed when the subroutine or interrupt is completed.
Interrupts save all registers on the stack. The order in which all data is pushed is shown below:
PCL, PCH, X, A, CCR
It goes without saying that the pull order is just the other way around! The three most significant bits of the PCH byte remain 0 because the maximum PC value is limited to 13 bits. The three most significant bits of the pushed CCR register are always 1.
The Program Counter
The program counter PC is normally incremented after fetching each instruction or operand byte during program execution.
The only way you can change this behaviour is with the jump, subroutine and return instructions.
Also interrupts can change the program counter's value.
The program counter is only 13 bits wide, limiting the program memory to 8k.
Timing
SB-Assembler Version 3 can show you the cycle times of each instruction when the TON list flag is switched on. The numbers presented are the number of clock pulses the processor needs to execute the instruction.
Reserved Words
The SB-Assembler 6805 cross overlay family has only one reserved word, the letter X. For the rest you may choose any label name you like.
Special Features
Indexed addressing mode
The official notation of the indexed addressing mode is offset,X, where offset is a 0, 8 or 16-bit unsigned offset value. However usually the offset value is $00 and that can be written in three different ways in the SB-Assembler:
LDAA $00,X
LDAA ,X
LDAA X
All three instructions have the same effect and all use an offset value of $00.
Forced direct page and extended addressing modes
One of the strongest features of the 6805 family is its direct page addressing mode. Direct page addressing mode is also called zero page addressing mode, because the 6805 can only use memory page 0 for direct addressing. With direct addressing mode you specify a memory location that can be addressed with only one byte (instead of 2 for all other memory locations). This way the 6805 can be seen as a microprocessor with 256 registers.
The SB-Assembler automatically selects direct addressing mode when that mode is available and the high byte of the address is $00 (being the zero page).
We only know for sure that the high byte of the address is $00 if there was no unresolved label in the expression identifying the address.
If a forward referenced label is used in an address expression we automatically assume the worst case situation and opt for extended addressing mode (2 bytes address field).
You may override this automatic selection of addressing mode by preceding the address field with a < or a > symbol.
The < symbol forces the assembler to use direct page addressing mode, even if the address expression contains a forward referenced label.
On the other hand the > symbol will force the assembler to use the extended addressing mode, even if the address could be resolved to a direct address.
But a Out of range error will be reported if you try to force to use the direct addressing mode where the high byte of the address isn't zero.
Examples:
0010- LABEL .EQ $10 A zero page address 8000-B6 10 LDA LABEL Appears to be zero page 8002-C7 00 11 LDA FORWARD Label value unknown during pass 1 8005-B6 11 LDA <FORWARD Clearly a forward referenced label 8007-B7 12 STA $12 Is a zero page address 8009-C7 00 11 STA >$11 Force extended addressing mode 0011- FORWARD .EQ $11 A zero page address
Alias and compatibility mnemonics
With alias mnemonics I mean a mnemonic that does exactly the same as Motorola's original mnemonic, but may be used instead.
There may be different reasons for you to use these alias mnemonics.
Maybe because they are easier to remember, or because they are the same as mnemonics of other Motorola processors you're used to.
The opcode test files highlight all the alias and compatibility mnemonics you may use and tells you what the original equivalents are.
Small difference in bit addressing notation
With bit-branch instructions the operand notation on the SB-Assembler differs slightly from the original Motorola notation. This is because the SB-Assembler won't allow spaces in operand fields, while Motorola recommends them at that point.
Example:
BRSET 0,$12,OFFSET Almost the same as Motorola ;-)
Please note that the comma in front of all the bit masks would have been a space with the Motorola assembler.
Overlay Initialization
Two things are set while initializing the 6805 overlay family every time it is loaded by the .CR directive.
- Big endian model is selected for 16-bit addresses and for the .DA and .DL directives. This means that words or long words are stored with their high byte first.
- The maximum program counter value is set to $1FFF.
Differences Between Other Assemblers
There are some differences between the SB-Assembler and other assemblers for the 6805 family of processors. These differences require you to adapt existing source files before they can be assembled by the SB-Assembler. This is not too difficult though, and is the (small) price you have to pay for having a very universal cross assembler.
- Not all assemblers allow you to use the shorter indexed mode.
- Not all assemblers will understand forced direct page and extended addressing modes.
- Not all assemblers will understand the alias mnemonics.
- The obvious differences in notation of directives and radixes common to all SB-Assembler crosses.
- Don't forget that the SB-Assembler does not allow spaces in or between operands. Only Version 3 will allow one space after each comma separating operands in the operand field.
